1. Field of the Invention
The present invention relates to a method of fabricating a semiconductor device on a group III-V compound semiconductor substrate, and more particularly, to a method of fabricating a semiconductor device having a non-alloyed contact layer, in which the barrier height across the interface of an electrode and the non-alloyed contact layer is lower than the barrier height across the interface of an electrode and the group III-V compound semiconductor substrate, thereby providing low resistance ohmic contacts.
2. Description of the Related Art
In the fabrication of low noise, high gain microwave devices, solid state lasers, and LEDs with low power dissipation, it is necessary to form low resistance ohmic contacts. Difficulties have been encountered in forming low resistance ohmic contacts to gallium arsenide (GaAs), indium phosphide (InP), gallium aluminum arsenide (GaAlAs), and gallium phosphide (GaP) because of the relatively high barrier height across the interface of a metal electrode and these group III-V compound semiconductors.
The contact resistivity .rho..sub.c of a metal on a heavily doped semiconductor is given by the equation ##EQU1## wherein .phi..sub.B is the barrier height across the interface of the metal and the semiconductor, N is the carrier concentration, m.sup.* is the electron or hole (carrier) effective mass in the semiconductor, and K is a constant which is dependent on the dielectric constant, the electronic charge and Planck's constant. Theoretically, i.e., with regard to equation (1), low resistivity ohmic contacts can be obtained by increasing the carrier concentration N, decreasing the barrier height .phi..sub.B, or by decreasing the charge carrier effective mass m.sup.*. For a given semiconductor, however, only the barrier height .phi..sub.B and the carrier concentration N can be varied, and the maximum carrier concentrations for most group III-V compound semiconductors are generally less than 10.sup.9 cm.sup.-3. Further, the barrier heights across the interface of different metals and group III-V semiconductors do not vary a great deal because of the pinning of the Fermi level. Thus, attempts to provide low resistivity ohmic contacts have been centered on increasing the carrier concentration N by unusual methods of achieving high doping, such as alloying gold-dopant alloys, or by lowering the barrier height .phi..sub.B across the interface of the metal and the semiconductor by epitaxially growing low band gap semiconductors. These two methods will be described below.
The alloying of metal-dopant alloys has been the most widely used method of obtaining low resistivity ohmic contacts. This method involves the heat treatment, or alloying, of a deposited gold-germanium (Au-Ge), gold-zinc (Au-Zn), or gold-berylium (Au-Be) alloy at temperatures higher than 360.degree. C., and the reaction of Au with Ga in, for example, a GaAs substrate, during alloying provides carrier concentrations of as high as 5.times.10.sup.19 cm-3 and contact resistivities as low as 10.sup.-6 .OMEGA.-cm.sup.2. This technique is discussed in an article entitled "A Review of the Theory and Technology for Ohmic Contacts to Group III-V Compound Semiconductors," by V. L. Rideout, Solid-State Electronics, Vol. 18, pp. 541-550 (1975).
The processing steps used to manufacture a semiconductor device having metal-dopant alloy ohmic contacts will be described with reference to FIGS. 1A-1C. As shown in FIG. 1A, a substrate 2 has an active region 4 formed therein by implanting silicon (Si), followed by annealing at approximately 850.degree. C. for 15 minutes. Alternatively, the active region 4 may be epitaxially grown on the main surface of the substrate 2. Then, isolation regions (not shown) are formed so that each semiconductor device is formed on an electrically isolated portion of the substrate 2. A mask 6 having source and drain openings is formed on the active region 4, and an alloy, for example, AuGe, is deposited on a surface of the active region 4 through the source and drain openings in the mask 6 using a conventional lift-off technique. The deposited alloy is then heat treated, or alloyed, to form AuGe ohmic contacts 8 and 10, as shown in FIG. 1B. Following the alloying, a mask 12 having a gate opening is formed and a channel is etched in the active region 4. Thereafter, a gate electrode 14 is deposited through the gate opening in the mask 12 and the mask 12 is removed, as shown in FIG. 1C. Devices having metal-dopant alloys formed by this method have several disadvantages, such as, (1) a lack of control over the alloy depth, (2) the sensitivity of the quality of the contacts to surface cleaning before depositing electrodes, (3) difficulty in obtaining contact resistivities of less than 10.sup.-6 .OMEGA.-cm.sup.2, and (4) rough interfaces with the semiconductor device which give rise to non-uniform current flow.
A second technique for reducing the contact resistivity is to lower the barrier height by epitaxially growing low band gap semiconductors to form heteroepitaxial ohmic contacts. The epitaxial growth of low band gap semiconductors is usually performed by molecular beam epitaxial growth (MBE) or by metal organic vapor phase epitaxial growth (MOVPE) of a layer of a semiconductor which can be lattice matched to the substrate and which has a low barrier height across the metal semiconductor interfaces. Semiconductors used for this purpose have been Ge and InAs which have barrier heights lower than 0.5 eV, compared with GaAs which has a barrier height of 0.7-0.9 eV. In addition, the electron effective mass of m.sup.* =0.02m for InAs (where m is the mass of an electron in free space) is much lower than the electron effective mass of m.sup.* =0.068m for GaAs. Contact resistivities of less than 10.sup.-7 .OMEGA.-cm.sup.2 have been obtained by growing heavily doped layers of Ge (N .about.10.sup.19 cm.sup.-3) or heavily doped and compositionally graded layers of InGaAs on GaAs. The lowest contact resistivities (10.sup.-8 .OMEGA.-cm.sup.2) have been achieved with metal/germanium/gallium arsenide ohmic contacts. Heteroepitaxial ohmic contacts are discussed in the following articles: "Ohmic Contacts to GaAs Using Graded Band Gap Layers of Ga.sub.1-x In.sub.x As Grown By Molecular Beam Epitaxy," by Woodall et al., Journal of Vacuum Science Technology, Vol. 19, No. 3, p. 624 (1981); and "Ultra Low Resistance Ohmic Contacts to n-GaAs," by Stall et al., Electronic Letters, Vol. 15, p. 800 (1979). The disadvantages of heteroepitaxial ohmic contacts are as follows: (1) they are not compatible with the planar technology necessary to fabricate microwave semiconductor devices; (2) they require expensive, complicated equipment to perform device processing steps which otherwise may not be performed; and (3) they require a lattice match with the substrate or epitaxial layer on which they are formed.